Computer Architecture and Assembly Language Programming (CS401)

1. When an element is pushed on the stack SP is decremented by ________.

   1. 3
   2. 2
   3. 4
   4. 1

2. The other directive is "define word" or "dw" with the same syntax as "db" but reserving a whole word of ________ bits instead of a byte.

   1. 32
   2. 8
   3. 16
   4. 64

3. The 8088 processor divides interrupts into ________ classes.

   1. One
   2. Two
   3. Three
   4. Four

4. Physical memory adresses is of

   1. 16 Bits
   2. 32 Bits
   3. 20 Bits
   4. 8 Bits

5. Which of the following string instruction is generally used in a loop instead of REP prefix?

   1. SCAS
   2. LODS
   3. CMPS
   4. STOS

6. "mov [bp], al" moves the one byte contents of the AL register to the address contained in BP register in the current ________.

   1. Stack Segment
   2. Data Segment
   3. Code Segment
   4. Extra Segment

7. Number of operands of ADC (add with carry) register are:

   1. 1
   2. 2
   3. 3
   4. 4

8. There are ________ registers in iAPX88 architecture that can hold address of data.

   1. 1
   2. 2
   3. 3
   4. 4

9. In branching mechanism, the assembler

   1. Replaces the target with its address
   2. Does not replace until the test condition is satisfied
   3. Finds the Branch offset and replaces the Branch target with it
   4. Replaces the target with the value specified by the DATAWORD directive

10. The purpose of MOVS instruction is:

    1. Move register to register
    2. Move register to a memory location
    3. Move a memory location to register
    4. Move memory to memory

11. ASCII table is the contiguous arrangement of the upercase alphabets (41-5A), the lowercase alphabets (61-7A), and the numbers ________.

    1. 31-40
    2. 29-39
    3. 30-39
    4. 31-41

12. In a comparison, if the both operands are same. The result of subtraction will be zero and the zero flag will be ________.

    1. Set
    2. Incremented
    3. Updated
    4. Decremented

13. Which of the following is a non-destructive AND operation?

    1. AND
    2. XOR
    3. OR
    4. Test

14. mov [1234], ax is an example of

    1. direct addressing
    2. base register indirect
    3. base+index addressing
    4. register indirect addressing

15. DX plays an important role in arithmetic ________.

    1. addition
    2. multiplication
    3. division
    4. subtraction

16. Which of the following Move generates error in .com file?

    1. Legal move
    2. Illegal move
    3. Ambiguous move
    4. Fetal move

17. Which of the following register is used to hold address of the next instruction to be executed?

    1. Memory address register
    2. Memory data register
    3. Instruction registers
    4. Program counter

18. ________ instruction makes the code reusable.

    1. Mov
    2. JMP
    3. CALL
    4. SHL

19. How many characters were defined by standard ASCII?

    1. 132
    2. 124
    3. 122
    4. 128

20. The top of stack is contained in ________ register.

    1. SP
    2. BP
    3. AX
    4. BX

21. Sending the appropriate signals on the control bus to the memory is the responsibility of ________.

    1. Memory
    2. Processor
    3. Control Bus
    4. Data Bus

22. The execution of the instruction "mov word [ES : 160], 0x1230" will print a character on the screen at:

    1. first column of second row
    2. second column of first row
    3. second column of second row
    4. first column of third row

23. In ________ every bit moves one position to the right and the bit dropped from the right is inserted at the left and also copied into the carry flag?

    1. ROL
    2. RCR
    3. RCL
    4. ROR

24. CX register is mostly used as a

    1. counter register
    2. flag register
    3. base register
    4. destination register

25. If AX=5, BX=5, CF and ZF are set, AF and DX contains zero then after the execution of instruction "ADC AX, BX", AX will contain the value ________.

    1. 5
    2. 10
    3. 11
    4. 6

26. MOV [BX+SI+300], AX is a ________ addressing mode instruction.

    1. Base + Index + Offset
    2. Base + Index
    3. Index Register Indirect + Offset
    4. Illegal

27. In general, width of a memory cell cannot be greater than the width of ________.

    1. Control Bus
    2. Data Bus
    3. Address Bus
    4. I/O Bus

28. All mathematical and logical operations are performed on the ________.

    1. Accumulator
    2. Arithmetic Logic Unit
    3. Program Counter
    4. Flag Register

29. ________ is a special instruction that load a segment register and a general purpose register from a memory locations.

    1. SCAS
    2. MOV
    3. CALL
    4. LES

30. Group of bits processor uses to inform memory which element to read/write is collectively known as

    1. Control bus
    2. Data bus
    3. Address bus
    4. RAM

31. Which of the following operation is used to clear any specific bit in a binary number?

    1. AND
    2. OR
    3. XOR
    4. NOT

32. Which part of this (00000000000 B80500) encoded instruction is an offset?

    1. First Column
    2. Second column
    3. B8
    4. 0500

33. SCAS compares a source byte or word in register AL or AX with the ________ string element addressed by ES: DI and updates the flags.

    1. Source
    2. Destination
    3. Flag
    4. Register

34. What does the given instruction do?
    SHR DL, 1

    1. move right most bit in carry
    2. move bit in DL
    3. Shift and store the One bit in DL
    4. Shift and store the most bit in DL

35. ________ is set only when the last mathematical or logical operation produces a zero in its destination.

    1. Single Flag
    2. Zero flag
    3. Trap Flag
    4. Parity Flag

36. The extention of assembly languague file is

    1. .doc
    2. .com
    3. .lst
    4. .asm

37. Stack is a data structure that behaves in a first in last ________ manner.

    1. In
    2. Out
    3. Push
    4. Add

38. The instruction, MOV AX, 0005H belongs to the address mode of ________ .

    1. Register
    2. Direct
    3. Immediate
    4. Register Relative

39. This jump is taken if the last arithmethic operation produced a positive number in its destination.

    1. JNP
    2. JO
    3. JNS
    4. JG

40. BH register is a ________ bit register.

    1. 8
    2. 16
    3. 24
    4. 32

41. The jump command that does not depend on FLAG register is

    1. JCXZ
    2. JO
    3. JNE
    4. JP

42. ________ is the basic means of sorting temporary data on the stack.

    1. PUSH
    2. POP
    3. CALL
    4. RET

43. Which of the following addressing scheme has been used in the instruction MOV [BX], AX?

    1. Base Register Direct
    2. Base Register Indirect
    3. Base + Offset
    4. Base + Index

44. ________ and ________ are taken if the last arithmetic operation produced a number in its destination that has odd parity.

    1. JP, JPE
    2. JS, JNS
    3. JCX, JNS
    4. JNP, JPO

45. In case of 32-bit processor, the size of an accumulator register will be ________ bits.

    1. 16
    2. 8
    3. 32
    4. 64

46. The interrupt call loads new values in ________ segment.

    1. ES
    2. DS
    3. CS
    4. SS

47. The jump is taken if the last arithmetic operation changed the sign unexpectedly.

    1. JO
    2. JNO
    3. JNZ
    4. JZ

48. All the addressing modes return the number after calculation, this number is known as ________ ?

    1. Base Address
    2. Offset Address
    3. Data Address
    4. Effective Address

49. ________ is a temporary storage places inside the processor.

    1. Memory
    2. Ram
    3. Cache
    4. Register

50. There are just ________ block processing instructions in 8088.

    1. 6
    2. 5
    3. 4
    4. 3

51. MUL (multiply) instruction performs an unsigned multiplication of the source operand and the ________ .

    1. Accumulator
    2. Carry
    3. Word
    4. Base

52. SP is associated with ____________ , by default.

    1. SS
    2. DS
    3. CS
    4. ES

53. Which bit of the attributes byte represents the red component of foreground color?

    1. 5
    2. 4
    3. 3
    4. 2

54. In STOSW instruction, when DF is clear, DI is ___________

    1. Incremented by 1
    2. Incremented by 2
    3. Decremented by 1
    4. Decremented by 2

55. Which of the following interrupts is Non maskable interrupt?

    1. INT 2
    2. INT 3
    3. INT 0
    4. INT 1

56. An 8 x 16 font is stored in ______________ bytes.

    1. 2
    2. 4
    3. 8
    4. 16

57. In DOS input buffer, the number of characters actually read on return is stored in ___________ byte.

    1. 3rd
    2. 4th
    3. 1st
    4. 2nd

58. Which of the following gives the more logical view of the storage medium?

    1. BIOS
    2. DOS
    3. Both
    4. None

Select a course code for Objective Questions:

ACC311 ACC501 BIF101 BIF401 BIF501 BIO101 BIO201 BIO202 BIO203 BIO204 BIO301 BIO302 BIO303 BIO401 BIO503 BNK603 BT101 BT201 BT301 BT302 BT401 BT402 BT403 BT404 BT405 BT406 BT501 BT504 BT505 BT604 CHE201 CHE301 CS001 CS101 CS201 CS202 CS204 CS301 CS302 CS304 CS311 CS401 CS402 CS403 CS408 CS501 CS502 CS504 CS506 CS508 CS601 CS602 CS604 CS605 CS607 CS609 CS610 CS614 CS707 CS710 ECO401 ECO402 ECO403 ECO404 EDU302 EDU401 EDU402 EDU501 EDU601 ENG101 ENG201 ENG301 ENG501 FIN611 FIN624 FIN625 ISL201 IT430 MCM101 MCM301 MGMT623 MGT101 MGT211 MGT301 MGT401 MGT402 MGT501 MGT502 MGT503 MGT510 MGT601 MGT603 MKT501 MKT610 MKT630 MTH101 MTH202 MTH302 MTH501 MTH601 MTH634 PAK301 PHY101 PHY301 PSY101 PSY403 PSY502 PSY512 SOC101 SOC301 SOC401 STA301 STA630 STA641 ZOO102 ZOO401 ZOO501 ZOO502 ZOO503 ZOO504 ZOO505 ZOO506 ZOO510 ZOO630

Select a course code for Subjective Questions:

ACC311 CS001 CS101 CS201 CS301 CS607 CS701 CS702 CS703 CS704 CS707 CS708 CS710 CS711 CS718 CS721 CS724 ECO401 ECO403 ENG101 ENG301 MGT703 MTH501 STA301