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Digital Logic Design (CS302)

Question (select most suitable option)

  When the transmission line is idle in an asynchronous transmission
It is set to logic low
It is set to logic high
It remains in previous state
State of transmission line is not used to start transmission
         
                             

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ACC311 ACC501 BIF101 BIF401 BIF501 BIO101 BIO201 BIO202 BIO203 BIO204 BIO301 BIO302 BIO303 BIO401 BIO503 BNK603 BT101 BT201 BT301 BT302 BT401 BT402 BT403 BT404 BT405 BT406 BT501 BT504 BT505 BT604 CHE201 CHE301 CS001 CS101 CS201 CS202 CS204 CS301 CS302 CS304 CS311 CS401 CS402 CS403 CS408 CS501 CS502 CS504 CS506 CS508 CS601 CS602 CS604 CS605 CS607 CS609 CS610 CS614 CS707 CS710 ECO401 ECO402 ECO403 ECO404 EDU302 EDU401 EDU402 EDU501 EDU601 ENG101 ENG201 ENG301 ENG501 FIN611 FIN624 FIN625 ISL201 IT430 MCM101 MCM301 MGMT623 MGT101 MGT211 MGT301 MGT401 MGT402 MGT501 MGT502 MGT503 MGT510 MGT601 MGT603 MKT501 MKT610 MKT630 MTH101 MTH202 MTH302 MTH501 MTH601 MTH634 PAK301 PHY101 PHY301 PSY101 PSY403 PSY502 PSY512 SOC101 SOC301 SOC401 STA301 STA630 STA641 ZOO102 ZOO401 ZOO501 ZOO502 ZOO503 ZOO504 ZOO505 ZOO506 ZOO510 ZOO630

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